Recently, the techniques of very large scale integrated circuits (VLSI) design are developed very fast. More and more process units for multimedia are disclosed consecutively. Meanwhile, the video process unit is more attractive because it has to introduce huge transmitting bandwidth and video storing memory for working. Therefore, there are several multimedia standards, such as H.261, H.263, H.263+, H.263++, MPEG-1-MPEG-2, MPEG-4, H.264/AVC and so on, are disclosed for reducing the requirements of transmitting bandwidth and video storing memory. However, those multimedia-processing methods should be executed via a large number of operations and huge external frame memory. Accordingly, in those above system, the process of motion estimation should be the core technique because it could remove the temporal redundancy in the video sequence for achieving the highest compression ratio. Certainly, the process of motion estimation would also occupy the greater part of operations and the memory of bandwidth because that process has to compare a large number of candidate blocks. For comparing those candidate blocks, a huge bandwidth of external frame memory should be introduced. Generally speaking, the system for motion estimation could be simply illustrated as FIG. 1. The huge bandwidth of external frame memory is introduced and that will cause the power consumption of the system bus to be increased. Therefore, it needs to provide a data reuse method of motion estimation for effectively reducing the requirement of bandwidth for external frame memory and preventing from influencing the result of motion estimation.
Presently, a common method of block matching algorithm is applied for motion estimation. Furthermore, a data reuse method of searching region with four levels ranged from A to D is disclosed and applied in a hardware accelerator to load the data of searching region for the comparison of motion estimation. (Referring to Mei-Yun Hsu, “Saclable module-based architecture for MPEG-4 BMA motion estimation,” M.S. thesis, National Taiwan Univ., June 2000; and J.-C. Tuan, T.-S. Chang, and C.-W. Jen, “On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture,” IEEE Trans. CSVT, vol. 12, no. 1, pp. 61-72, January 2002.) Meanwhile, data reuse method of level C introduces a block matching by means of respectively comparing two horizontal and consecutive blocks to the overlapped blocks of the searching range. This method provides the good states of internal memory and external frame memory simultaneously and is usually applied in a hardware accelerator of motion estimation. However, in practice, the high-resolution video tends to be popularized and the application of level C won't to be suitable for use anymore. For HDTV 1280×720 with 30 frames in per second, the searching range in horizontal direction has the hardware accelerator as [−128,128] and huge bandwidth of 536 MByte/s for external frame memory should be introduced when the data reuse method with level C is put in use. Thus, the system loading would be increased. Therefore, it needs to provide a data reuse method of motion estimation, which is capable of effectively reducing the requirement of bandwidth for external frame memory, preventing from influencing the result of motion estimation, and can rectify those drawbacks of the prior art and solve the above problems. The present invention discloses a data reuse method of motion estimation for effectively reducing the requirement of bandwidth for external frame memory and preventing from influencing the result of motion estimation, thereby being novel and practical.